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3a ddr termination regulator ap2302 preliminary datasheet 1 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited figure 1. package types of ap2302 general description the ap2302 linear regulator is designed to meet the jedec specification sstl-2 and sstl-18 for termi- nation of ddr-sdram. the regulator can sink or source up to 3a current continuously, offers enough current for most ddr applications. output voltage is designed to track the refe rence voltage within a 2% (ddr i) and 3% (ddr ii) tolerance for load regulation while preventing shooting through on the output stage. on-chip thermal limiting provides protection against a combination of high curren t and ambient temperature which would create an exces sive junction temperature. the ap2302, used in conjun ction with series termina- tion resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs. the ap2302 is available in soic-8, to-252-5l and to-263-5l packages. features support both ddr i (1.25v tt ) and ddr ii (0.9v tt ) requirements source and sink current up to 3a high accuracy output voltage at full-load adjustable v out by external resistors shutdown for standby or suspend mode operation with high -impedance output applications ddr-sdram termination ddr-ii termination sstl-2 termination soic-8 to-252-5l to-263-5l
3a ddr termination regulator ap2302 preliminary datasheet 2 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited pin description pin configuration m package 7 v cntl 6 v cntl 5 v cntl 1 2 3 4 v in gnd refen v out (soic-8) (to-252-5l) d package v in gnd v cntl (tab) refen v out 8 v cntl s5 package (to-263-5l) refen v in gnd v cntl (tab) v out pin number pin name function soic-8 to-252-5l to-263-5l 1 1 1 v in power input 2 2 2 gnd ground 3 4 4 refen reference voltage input and chip enable 45 5 v out output voltage 5, 6, 7, 8 3 3 v cntl supply voltage for internal circu it (internally connected for soic- 8), (tab for to-252-5l and to-263-5l) figure 2. pin configuration of ap2302 (top view) 5 4 3 2 1 5 4 3 2 1
3a ddr termination regulator ap2302 preliminary datasheet 3 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited functional block diagram figure 3. functional block diagram of ap2302 package temperature range part number marking id packing type tin lead lead free tin lead lead free soic-8 0 to 125 o c ap2302m ap2302m-e1 2302m 2302m-e1 tube ap2302mtr AP2302MTR-E1 2302m 2302m-e1 tape reel to-252- 5l 0 to 125 o c ap2302d ap2302d-e1 ap2302d ap2302d-e1 tube ap2302dtr ap2302dtr-e1 ap2302d ap2302d-e1 tape reel to-263- 5l 0 to 125 o c ap2302s5 ap2302s5-e1 ap2302s5 ap2302s5-e1 tube ap2302s5tr ap2302s5tr- e1 ap2302s5 ap2302s5-e1 tape reel ordering information circuit type package e1: lead free blank: tin lead ap2302 - tr: tape and reel blank: tube bandgap start up current limit thermal protect output control refen v in v cntl gnd v out 1 2 3 (5, 6, 7, 8) 4 (3) 5 (4) m: soic-8 d: to-252-5l s5: to-263-5l a(b) a for 5-pin b for 8-pin bcd semiconductor's pb-free products, as designated with "e1" suffix in th e part number, are rohs compliant.
3a ddr termination regulator ap2302 preliminary datasheet 4 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited absolute maximum ratings (note 1) recommended operating conditions note 1: stresses greater than those li sted under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only, and functional operation of th e device at these or any othe r conditions beyond those indicated under "recommended operating c onditions" is not implie d. exposure to "absolute maximum ratings" for extended periods may affect device reliability. parameter symbol value unit supply voltage for internal circuit v cntl 7v power dissipation p d internally limited w esd (human body model) esd 2 kv junction temperature t j 150 o c storage temperature range t stg -65 to 150 o c lead temperature (soldering, 10sec) t lead 260 o c package thermal resistance (free air) ja soic-8 160 o c/w to-252-5l 130 to-263-5l 90 parameter symbol min typ max unit supply voltage for internal circuit v cntl (note 2, 3) ` 3.36v power input ddr i v in 1.6 2.5 v cntl v ddr ii 1.8 junction temperature t j 0 125 o c note 2: keep v cntl ? v in in power on and power off sequences. note 3: for safe operation, v cntl must be tied to 3.3v rather than 5v.
3a ddr termination regulator ap2302 preliminary datasheet 5 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited parameter symbol conditions min typ max unit output offset voltage v os i l =0a (note 4) -20 0 20 mv load regulation ddr i ? v out / v out i l =0 to 1.5a 0.8 2 % i l =0 to -1.5a 0.8 2 ddr ii i l =0 to 1.5a 1.2 3 i l =0 to -1.5a 1.2 3 quiescent current of v cntl i q no load 3 5 ma leakage current in shutdown mode i shdn v refen <0.2v, r l =180 ? 36 a protection current limit i limit 3a thermal shutdown temperature t shdn 3.3v v cntl 5v 150 o c thermal shutdown hysteresis 50 o c shutdown function shutdown threshold trigger output=high 0.8 v output=low 0.2 electrical characteristics (t j =25 o c, v in =2.5v, v cntl =3.3v, v refen =1.25v, c out =10 f (ceramic), unless ot herwise specified.) note 4: v os is the voltage measurement defined as v out subtracted from v refen .
3a ddr termination regulator ap2302 preliminary datasheet 6 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited typical performance characteristics figure 6. threshold voltage vs. junction temperature figure 7. threshold voltage vs. junction temperature figure 4. sourcing current vs. junction temperature figure 5. sinking current vs. junction temperature -40 -20 0 20 40 60 80 100 120 2 4 6 v cntl =3.3v v in =2.5v v out =1.25v sourcing current (a) junction temperature ( o c) -40-20 0 20406080100120 2 4 6 v cntl =3.3v v in =2.5v v out =1.25v sinking current (a) junction temperature ( o c) -40 -20 0 20 40 60 80 100 120 500 550 600 650 v cntl =3.3v v in =2.5v threshold voltage (mv) junction temperature ( o c) -40 -20 0 20 40 60 80 100 120 500 550 600 650 v cntl =5.0v v in =2.5v threshold voltage (mv) junction temperature ( o c)
3a ddr termination regulator ap2302 preliminary datasheet 7 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited 25 50 75 100 125 0.16 0.18 0.20 0.22 0.24 0.26 0.28 0.30 v cntl =3.3v v refen =1.0v r ds(on) ( ? ) junction temperature ( o c) v in =0.9v v in =0.85v v in =0.8v 25 50 75 100 125 0.16 0.18 0.20 0.22 0.24 0.26 0.28 0.30 v cntl =5.0v v refen =1.0v r ds(on) ( ? ) junction temperature ( o c) v in =0.9v v in =0.85v v in =0.8v typical performance ch aracteristics (continued) figure 10. r ds(on) vs. junction temperature figure 11. r ds(on) vs. junction temperature figure 8. 0.9v tt at 3a transient response figure 9. 1.25v tt at 3a transient response time ( s) time ( s) output transient voltage (mv) outpu t current (a) 20 -20 3 -3 output transient voltage (mv) outpu t current (a) (conditions: v in =2.5v, v cntl =3.3v, c out =10 f) (conditions: v in =2.5v, v cntl =3.3v, c out =10 f) 0 40 -1 1 -5 20 -20 3 -3 0 40 -1 1 -5
3a ddr termination regulator ap2302 preliminary datasheet 8 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited typical performance ch aracteristics (continued) figure 12. copper area vs. power dissipation 4.04.55.05.56.06.57.07.58.0 100 150 200 250 300 350 copper area (mm 2 ) power dissipation (w) t c =25 o c t c =50 o c t c =65 o c package: soic-8 no heatsink figure 13. copper area vs. power dissipation 6.06.57.07.58.08.59.09.510.0 100 150 200 250 300 350 copper area (mm 2 ) power dissipation (w) t c =25 o c t c =50 o c t c =65 o c package: to-252-5l no heatsink figure 14. copper area vs. power dissipation 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 100 150 200 250 300 350 copper area (mm 2 ) power dissipation (w) t c =25 o c t c =50 o c t c =65 o c package: to-263-5l no heatsink
3a ddr termination regulator ap2302 preliminary datasheet 9 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited typical application figure 15. typical application of ap2302 r1=r2=100k ? , r tt =50 ? / 33 ? / 25 ? r dummy =1k ?, as for v out discharge when v in is not present but v cntl is present c ss =1 f, c in =470 f, c cntl =47 f, c out =470 f v in v cntl refen ap2302 v out gnd r tt r dummy c out v cntl = 3.3v en r 1 r 2 c ss c cntl c in v in = 2.5v
3a ddr termination regulator ap2302 preliminary datasheet 10 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited mechanical dimensions soic-8 unit: mm(inch) 0 8 1 5 r 0 . 1 5 0 ( 0 . 0 0 6 ) r0.150(0.006) 1.000(0.039) 0.330(0.013) 0.510(0.020) 4.800(0.189) 5.000(0.197) 1.350(0.053) 1.750(0.069) 0.100(0.004) 0.300(0.012) 0.900(0.035) 0.800(0.031) 0.200(0.008) 3.800(0.150) 4.000(0.157) 7 7 2 0 : 1 d 1.270(0.050) typ 0.190(0.007) 0.250(0.010) 8 d 5.800(0.228) 6.200(0.244) 0.675(0.027) 0.725(0.029) 0.320(0.013) 8 9
3a ddr termination regulator ap2302 preliminary datasheet 11 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited mechanical dimens ions (continued) to-252-5l unit: mm(inch) 2.180(0.086) 2.400(0.094) 0.000(0.000) 0.250(0.010) 0.900(0.035) 1.250(0.049) 0.450(0.018) 0.700(0.028) 0.430(0.017) 0.600(0.023) 0.430(0.017) 0.600(0.023) 6.350(0.250) 6.700(0.264) 4.300(0.169) 5.500(0.217) 5 . 9 7 0 ( 0 . 2 3 5 ) 6 . 2 2 0 ( 0 . 2 4 5 ) 2.540(0.100)bsc 5.080(0.200) bsc 9.500(0.374) 10.400(0.410) 2 . 5 5 0 ( 0 . 1 0 0 ) 3 . 2 0 0 ( 0 . 1 2 6 ) 1 . 4 0 0 ( 0 . 0 5 5 ) 1 . 7 8 0 ( 0 . 0 7 0 ) 4 . 8 0 0 ( 0 . 1 8 9 ) m i n 4.300(0.169) 5.400(0.213)
3a ddr termination regulator ap2302 preliminary datasheet 12 jul. 2006 rev. 1. 2 bcd semiconductor manufacturing limited mechanical dimens ions (continued) to-263-5l unit: mm(inch) 9.880 (0.389) 10.180 (0.401) 1.560 (0.061) 1.760 (0.069) 8.200 (0.323) 8.600 (0.339) 5.080 (0.200) 5.480 (0.216) 0.710 (0.028) 0.910 (0.036) 1.700 (0.067) typ 6.700 (0.264) 6.900 (0.272) 15.140 (0.596) 15.540 (0.612) 1.170 (0.046) 1.370 (0.054) 4.470 (0.176) 4.670 (0.184) 0.020(0.001) 0.250(0.010) 2.340 (0.092) 2.740 (0.108) 0.310 (0.012) 0.530 (0.021) 5.600 (0.220) ref
important notice bcd semiconductor manufacturing limited reserves the right to make changes without further not ice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing limited 800, yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 bcd semiconductor manufacturing limited main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd. shenzhen office advanced analog circuits (shanghai) corporation shenzhen office 27b, tower c, 2070, middle shen nan road, shenzhen 518031, china tel: +86-755-8368 3987, fax: +86-755-8368 3166 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808, fax: +886-2-2656 2806 usa office bcd semiconductor corporation 3170 de la cruz blvd., suite 105, santa clara, ca 95054-2411, u.s.a tel: +1-408-988 6388, fax: +1-408-988 6386 - ic design group advanced analog circuits (shanghai) corporation 8f, zone b, 900, yi shan road, shanghai 200233, china tel: +86-21-6495 9539, fax: +86-21-6485 9673 bcd semiconductor manufacturing limited http://www.bcdsemi.com

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